A) Field of the Invention
The present invention relates to a solid state image pickup device, and more particularly to a solid state image pickup device having a wide dynamic range.
B) Description of the Related Art
Solid state image pickup devices are widely used which has a number of photodiode pixels on a semiconductor substrate. As the number of pixels is increased by high integration, the resolution becomes high. Some solid image pickup devices surpass the resolution of silver salt cameras. If a chip area is suppressed from being broadened and the number of pixels is increased, the area occupied by one pixel can be reduced. In order to avoid a low S/N ratio and obtain a high sensitivity, it is desired to efficiently use incidence light.
A light reception area of the semiconductor substrate is required to form not only photodiodes but also charge transfer CCDs for a CCD type, and an image signal forming circuit and an image signal transfer unit for a MOS type. Light incident upon an area excepting the photodiode area is unavailable. In order to efficiently use incidence light, on-chip micro lenses have been formed above pixels.
FIG. 11A is a cross sectional view showing the structure of a CCD solid state image pickup device having on-chip micro lenses proposed in Japanese Patent Publication No. HEI-4-55028. Photodiodes PDs and VCCD channels VCs are formed in regions in a surface layer of a semiconductor substrate SUB, the regions having an opposite conductivity to that of the substrate. Electric charges can be read from the photodiode PD to the channel VC via a transfer gate region TG formed therebetween. Transfer electrodes TE are formed on an insulating layer above the transfer gate region TG and channel VC, and a light shielding layer LS is formed above the transfer electrodes TE. The light shielding layer LS intercepts light incident upon a nearby area of the channel VC to reduce noises.
On-chip micro lenses MLs are formed on a planarizing layer PL formed above the substrate. Each on-chip micro lens has its optical axis aligned with the center of a corresponding photodiode. The micro lenses are formed contacting each other to converge most of incidence light upon photodiodes. By using the on-chip micro lenses, incident light can be used efficiently irrespective of that the light shielding layer exists.
A photodiode accumulates signal charges by an amount corresponding to the incidence light amount. As the charges in the photodiode saturate, the charges generated thereafter by photoelectric conversion of incidence light cannot be accumulated. If the opening through which light becomes incident upon a photodiode is made narrow, although the dynamic range can be increased because of the reduced amount of charges generated by a unit light amount, the sensitivity lowers. If the sensitivity is to be retained, the dynamic range of a solid state image pickup device having photodiode pixels becomes narrower than that of a silver salt film.
A combination of a high sensitivity photoelectric conversion element and a low sensitivity photoelectric conversion element formed in one pixel area has been proposed in order to broaden the dynamic range.
FIG. 11B is a plan view showing the structure of a solid state image pickup device having a pixel division structure proposed in Japanese Patent Laid-open Publication No. HEI-9-205589. In one pixel area, two photodiodes PD1 and PD2 are formed separated by a channel stop region CS. A light shielding film is formed above the photodiodes. The light shielding film has a broad opening LA above the photodiode PD1 and a narrow opening SA above the photodiode PD2. The broad opening LA forms a high sensitivity photoelectric conversion element HS-PEC, and the narrow opening SA forms a low sensitivity photoelectric conversion element LS-PEC. An on-chip micro lens ML is disposed above the broad opening LA to further improve the sensitivity.
Light not incident upon the on-chip micro lens ML and the narrow opening SA is not used. If an on-chip micro lens covering most of the pixel area such as shown in FIG. 11A is used, although most of incidence light can be used, the incidence light cannot be distributed to the two openings LA and SA because the micro lens has only one focal point.
The present applicant submitted the application proposing the structure that two photodiodes, a main and a subsidiary photodiode formed in each pixel area, are exposed in a common opening (refer to Japanese Patent Laid-open Publication No. 2003-218343).
FIGS. 12A, 12B and 12C are a plan view and cross sectional views showing in part the proposed structure.
FIG. 12A is a plan view of a solid state image pickup device, and FIGS. 12B and 12C are cross sectional views taken along lines XB—XB and XC—XC shown in FIG. 12A. In FIG. 12A, two pixels PIXs are shown disposed side by side. Each pixel PIX includes a main photodiode region 3 and a subsidiary photodiode region 4. A vertical charge transfer channel (VCCD) 8 is disposed to the right of the pixel PIX.
In the honeycomb pixel layout shown, pixels on the upper and lower sides of the two pixels shown are disposed at positions shifted by a half pitch in the lateral direction. Polysilicon electrode 24, 25, 28 and 29 (collectively indicated by EL) for four-phase drive are disposed above VCCD 8. For example, the transfer electrodes 24 and 28 are made of a first polysilicon layer and the transfer electrodes 25 and 29 are made of a second polysilicon layer. The transfer electrode 25 also controls reading charges from the subsidiary photodiode 4, and the transfer electrode 28 also controls reading charges from the main photodiode 3.
As shown in the cross sectional views of FIGS. 12B and 12C, a p-type well 2 is formed in the surface layer of an n-type semiconductor substrate 1. Two n-type regions 3 and 4 are formed in the surface layer of the p-type well 2 to constitute the two main and subsidiary photodiodes. A p+-type region 7 is a channel stopper for electrical separation of pixels, VCCDs and the like. As shown in FIG. 12C, an n-type channel region 8 constituting VCCD is formed near the n-type region 3 (4) constituting the photodiode. The n-type region 3 (4), p-type well 2 and n-type substrate 1 constitute a shutter structure.
An insulating layer of silicon oxide or the like is formed on the surface of the semiconductor substrate, and the transfer electrodes EL of polysilicon are formed on the insulating layer. The transfer electrodes EL are disposed covering the area above the VCCD channel 8. An insulating layer of silicon oxide or the like is formed covering the transfer electrodes EL. A light shielding film 12 of tungsten or the like is formed on the insulating layer. The light shielding film 12 covers the constituent elements of pixels such as VCCDs and has openings above the photodiodes. An interlayer insulating film 13 of phosphosilicate glass or the like is formed covering the light shielding film 12, the interlayer insulating film 13 having a planarized surface.
A color filter 15 is formed on the interlayer insulating film 13. On-chip micro lenses 16 of resist or the like are formed on the color filter 15 at positions corresponding to the pixels. One on-chip micro lens 16 is formed above each pixel, and an opening 18 of the light shielding film 12 is disposed under the on-chip micro lens 16. The on-chip micro lens 16 has a function of converging downward incident light toward the opening 18.
It is desired to improve the light convergence efficiency because of recent device miniaturization and high integration. It is said that the convergence effect of the on-chip micro lens is now almost at its limit, and various proposals have been made to inserting an in-layer (inner) lens under the on-chip micro lens (for example, refer to Japanese Patent Laid-open Publication No. HEI-11-40787).